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In computer architecture, A control bus is (part of) a computer bus, used by CPUs for communicating with other devices within the computer. While the address bus carries the information on which device the CPU is communicating with and the data bus carries the actual data being processed, the control bus carries commands from the CPU and returns status signals from the devices. For example if the data is being read or written to the device the appropriate line (read or write) will be active (logic zero). == Lines == The number and type of lines in a control bus varies but there are basic lines common to all microprocessors, such as: * Read (). A single line that when active (logic zero) indicates the device is being read by the CPU. * Write (). A single line that when active (logic zero) indicates the device is being written by the CPU. * Byte enable (). A group of lines that indicate the size of the data (8, 16, 32, 64 bytes). Additional lines are microprocessor-dependent, such as: * Transfer ACK ("acknowledgement"). Delivers information that the data was acknowledged (read) by the device. * Bus request. Indicates a device is requesting the use of the (data) bus. * Bus grant. Indicates the CPU has granted access to the bus. * Interrupt request. A device with lower priority is requesting access to the CPU. * Clock signals. The signal on this line is used to synchronize data between the CPU and a device. * Reset. If this line is active, the CPU will perform a hard reboot. 抄文引用元・出典: フリー百科事典『 ウィキペディア（Wikipedia）』 ■ウィキペディアで「control bus」の詳細全文を読む スポンサード リンク
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